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  5. APP4MC.sim - Timing simulation of embedded systems

APP4MC.sim - Timing simulation of embedded systems

Session details
Status: 
Declined
Speaker(s): 
Harald Mackamul (Robert Bosch GmbH)
Sebastian Reiser (Robert Bosch GmbH)
Experience level: 
Beginner
Tags: 
Simulation
SystemC
MBSE
modeling
Session Track: 
Built on Eclipse Technologies
Session Type: 
Standard

An abstract, non-functional timing simulation supports the system architect in the step from the idea to the elaborated concept and immediately serves as an executable specification. The model elements for describing the software are limited to processor runtimes and access to hardware resources. Through this abstraction, the distribution of software in the system and dynamic effects from the scheduler behaviour can be evaluated quickly. For effective and early runtime analysis of AMALTHEA models, we have therefore extended the APP4MC ecosystem with the simulation framework APP4MC.sim. In particular, our solution allows the consideration of software aspects and also the investigation of effects caused by concurrent access to shared hardware resources, especially memory in multi-core architectures. At its core, APP4MC.sim is based on the SystemC library with TLM extensions, which provides a solid foundation due to its widespread use and large user community.

We will present the steps from a model via an executable SystemC simulation to an event trace:

  • Code generation (Java, Guice, Xtend2)
  • Simulation (SystemC user libraries + generated code)
  • Analysis of event traces (Trace Compass, Amalthea Trace Database)

The work is funded within the framework of the ITEA3 project Panorama.

Objective of the presentation: 
Methods and open-source tools that generate the source code of a SystemC simulation from an abstract model. The execution of this simulation enables the analysis of the temporal behaviour of complex embedded software systems.
Attendee pre-requisites - If none, enter "N/A": 
N/A
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