An Eclipse true story: Embedded systems design from UML modelling down to system simulation

Session Type: 
Standard [35 minutes]

By adopting virtual platforms design concepts for system architecture development, analysis, optimization, verification, and validation; embedded systems can be completed sooner and with higher quality. We propose a hardware/software co-simulation tool made of three eclipse plug-ins that target the generation of virtual platforms from higher level models.

In this session will be introduced the MODUS HW/SW co-simulation module, which is completely integrated in the Eclipse JUNO Tools, providing a unified framework for modelling, developing and simulating a system. The design flow will start from model elaboration using the UML MARTE Profile relying on the eclipse MDT Papyrus plug-in. From this model, SystemC code to simulate will be generated using a generation engine developed with the Acceleo 3.2 plug-in. Finally the eclipse CDT plug-in for C++ development will be used to complete and configure the generated code. The resulting code is standard C++ code and is ready for compilation using standard compliant C++ compilers.

Schedule info

Time slot: 
6 June 10:15 - 10:50


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