vhdl

Bringing the power of Eclipse to VHDL designers

Session Type: 
Standard [35 minutes]
Speakers

Digital hardware designers develop state-of-the-art chips that perform extremely complex tasks at high speeds. Sadly they rely on antiquated tools to create those very chip designs. The most popular design entry tool today is still Emacs...

Schedule info

Time slot: 
6 June 14:15 - 14:50
Room: 
Spot
Status: 
Accepted

Audience

Track: 
Eclipse in the Industry
Experience level: 
Beginner