OmpSs@FPGA is a directive-based programming model that allows to express tasking targeting FPGAs. The OmpSs compiler splits the code in two parts, host and FPGA, and it compiles each with the appropriate target compiler. The host code is usually given to GCC, and the FPGA code goes to the Xilinx Vivado HLS for high level synthesis to VHDL and bitstream.
In the integration with Eclipse Che, we have included a plugin to improve programmer productivity by suggesting the proper directives and clauses, and the automatic invocation of all compiler passes, in such a way that with a single button, the programmer triggers the compilation for host and FPGA. As a result, he/she obtaine the binary file to execute in the target architecture, and the bitstream to configure the FPGA with the IPs to accelerate the parts of the application indicated through directives.
More information on the OmpSs programming model: https://pm.bsc.es/ompss-2
Basic knowledge of computer science (C/compilers/runtimes/applications) would be enough to follow the session. Attendees with knowledge on reconfigurable computing and FPGAs will be probably taking more advantage of attending the session, as I will show a way to generate IP blocks on the FPGA based on high-level synthesis, in a more automatic and confortable way than using the usual vendor tools available.