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Yuichi Nakamura
In this short talk, the Eclipse-based code quality analysis toolset
including the memory management and code coverage measurement tools for
embedded systems is presented.
This memory management tool is developed as a graphical front-end to
display various memory statistics, such as memory leaks, illegal
accesses and cache hit rates, using Valgrind open-source software as a
back-end running at the remote target system. The code coverage
measurement tool works as a graphical front-end for the Gcov
open-source software.
The analysis is performed with the target embedded system which is
running Linux and the host PC with Eclipse installed. The communication
between the target and the host is achieved by extending the "TCPstub"
remote service server which we developed and demonstrated at the
EclipseCON 2007. In addition, the capability of TPTP is discussed in
this presentation. We tried and compared two implementations; One is
TPTP-based the other is our original GUI. Although the TPTP-based
interface can be integrated with other plug-ins easily, it cannot
present full features of Valgrind and Gcov. For example, Valgrind has
cachegrind, or a cache profiler, but it is impossible to show its
result with TPTP. Therefore, we need to develop the GUI independently
to explore full features of Valgrind and Gcov.
We demonstrate that our code quality analysis user interface enables
users to debug application software running at the embedded system
efficiently using full features of Valgrind and Gconv. We also welcome
discussions on TPTP issues.
Kouhei Nadehara has been working on multimedia enhancements of 32-bit RISC and digital signal processors, their development tools and multimedia software implementations since he joined NEC in 1992.
Yuichi Nakamura received a B.E. in information engineering and a M.E. in electrical engineering from Tokyo Institute of Technology in 1986 and 1988. He received PhD. from Graduate School of Information, Production, and Systems, Waseda University.
In 1988, he joined NEC Corporation, where he is currently a principal researcher of the System IP Core Research Laboratories. He published more than 40 papers about embedded system design. His research interests include the design and verification of embedded systems, hardware and software.